Hi @grallis, I think you are correct about your realizations.
While this is a fascinating topic for me, I’ll try to not extend myself in too many details. As someone who has been part of the development of a non-commercial/hobby ESCs for a high-current DC motor, I don’t know if there is an easy way to size a good capacitor bank to prevent overvoltage in the MOSFETs when not in the design phase, and even at the design stage, everything is just estimated models until testing - and sometimes only after many iterations we are able to control this overvoltage phenomenon.
Considering that the ESC was perfectly fine regarding the MOSFETs overvoltage without the added length of cable, then we would only need to compensate for the added inductance from the added length of cable.
But before anything else, from a system-design perspective, I’d advise that it would be way easier, if possible, to reduce the ESC’s input cable length to a minimum, and move all that extra cable length to the motor side, braiding the three-phase cables if possible, to reduce electromagnetic interference. In any case, but especially if not possible, a twisted pair will always have a lower impedance than a non-twisted one, so it also helps for the battery cables.
Continuing, I don’t see any flaw in your line of thought - It’s a series RLC circuit where you need a damped response, and as you solved, the capacitor value will be C > 4L/R^2 for a system with real poles (overdamped). For completeness, I can only recommend the theory of snubber designs (like this app note from Rohm) as they have a more specific way to work with this RLC system, with interesting insights.
The opposite of the in-depth snubber theory would be to simply let the resistance aside, and think only about energy - the energy the capacitor needs to absorb during the overvoltage must be many times (to compensate non-idealities) greater than the inductor’s energy:
\begin{align}
E_C &> k\cdot E_L\\
0.5 C\cdot \Delta V^2 &> k\cdot 0.5 L I^2\\
C &> k\cdot L (I / \Delta V)^2
\end{align}
where:
C is the added capacitance
L is the added inductance
I is the ESC input (peak) current
\Delta V is the overvoltage allowed
k is our non-ideality compensation factor
For sake of a numeric example, let’s say that for a 50A (peak) input current ESC with 2 feet long (assuming you are already taking both positive and negative cables into account) 8AWG cables, it would have approximately 716nH (calculator here). Imagining 30V Mosfets and a 16V battery, I would leave some voltage margin and accept 5V of overvoltage, thus the capacitance would need to be higher than k\cdot 86\mu F. I’d start with a k\approx 10 if space/weight is acceptable, like 8 parallels of electrolytic 100µF (50 or 63V) 105°C, or 4 x 220µF.
For a more real-world example - I’m adding it here 'cause I know it’s something rare to find, for an open-source solar-powered racing boat that I work on as a hobby (Zenite Solar), we ended up choosing 6 aluminum electrolytic 4700uF 400V 105°C for a system with approximately 2 meters 1AWG cables and 300A peak current being switched at 12.5kHz. The MOSFETs were for 100V and the system battery could reach 60V but was 36V nominal. I only have data running 100 amps and with the capacitor bank, and the bus voltage was pretty flat (see the image below). This is a different system, with inherently much more stray inductances and higher current than BlueRobotic’s Basic ESC, but if you do the math, you can see more or less the design factors using different approaches.
~5V of
\Delta V when 100A was drawn with three Optima D35 batteries in series (36V).
And here are the typical spikes at the MOSFETs when running with 100A - nice to remember that the MOSFETs here also have tuned RDC snubbers to keep oscillations/peaks at acceptable levels and acceptable losses:
To give you a grasp of the real size of the system, the ESC with its capacitor bank is inside the red squares. The battery cables are those thick that come from the right, and the motor is far away on the left:
About too much capacitance, more is usually (but not always) better - the dynamical and negative impedance of DC/DC converters can create resonances in different frequencies for different operating points - search for “input filter stability for DC/DC converters” if interested. The general rule of thumb is that the output impedance of the filter (in this case, this RLC) must always be much lower than the input impedance of the system (the ESC). So for this case, I believe it’s safe to assume that increasing the capacitance will be safe.
I believe only iterations of testing and modeling can solve this problem. But I hope it helps you, at least with a starting point. Let me know if you need anything further!
